"A unified processor architecture for RISC & VLIW DSP."

Tay-Jyi Lin et al. (2005)

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DOI: 10.1145/1057661.1057675

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Tay-Jyi Lin, Chie-Min Chao, Chia-Hsien Liu, Pi-Chen Hsiao, Shin-Kai Chen, Li-Chun Lin, Chih-Wei Liu, Chein-Wei Jen:
A unified processor architecture for RISC & VLIW DSP. ACM Great Lakes Symposium on VLSI 2005: 50-55

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