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ORCID6th MEMOCODE 2008: Anaheim, CA, USA
- 6th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2008), June 5-7, 2008, Anaheim, CA, USA. IEEE Computer Society 2008, ISBN 978-1-4244-2417-7
Formal Verification
- Omid Sarbishei, Bijan Alizadeh, Masahiro Fujita:
Arithmetic Circuits Verification without Looking for Internal Equivalences. 7-16 - Christophe Jacquet, Frédéric Boulanger, Dominique Marcadet:
From Data to Events: Checking Properties on the Control of a System. 17-26 - Luigi Di Guglielmo, Franco Fummi, Graziano Pravadelli
:
Vacuity Analysis by Fault Simulation. 27-36
Semantics of System Description Languages
- Subash Shankar, Masahiro Fujita:
Rule-Based Approaches for Equivalence Checking of SpecC Programs. 39-48 - Nalini Vasudevan, Stephen A. Edwards:
Static Deadlock Detection for the SHIM Concurrent Language. 49-58 - Claude Helmstetter, Olivier Ponsini:
A Comparison of Two SystemC/TLM Semantics for Formal Verification. 59-68
Poster Session
- Greg Hoover, Forrest Brewer, Chris Gill:
Latency-Insensitive Hardware/Software Interfaces. 71-72 - Radu Mateescu, Emilie Oudot:
Bisimulator 2.0: An On-the-Fly Equivalence Checker based on Boolean Equation Systems. 73-74 - Yann Oddos, Katell Morin-Allory, Dominique Borrione:
Assertion-Based Design with Horus. 75-76
Tools and Techniques for Processor Design
- Steve Haynal, Timothy Kam, Michael Kishinevsky, Emily Shriver, Xinning Wang:
A System Verilog Rewriting System for RTL Abstraction with Pentium Case Study. 79-88 - Michael Katelman, José Meseguer, Santiago Escobar:
Directed-Logical Testing for Functional Verification of Microprocessors. 89-100 - Daniel Grund, Jan Reineke:
Estimating the Performance of Cache Replacement Policies. 101-112
Models of Computation
- Christian Zebelein, Joachim Falk, Christian Haubelt, Jürgen Teich:
Classification of General Data Flow Actors into Known Models of Computation. 119-128 - Bijoy Antony Jose, Sandeep K. Shukla, Hiren D. Patel, Jean-Pierre Talpin:
On the Deterministic Multi-threaded Software Synthesis from Polychronous Specifications. 129-138 - Yue Ma, Jean-Pierre Talpin, Thierry Gautier:
Virtual prototyping AADL architectures in a polychronous model of computation. 139-148
Co-Design Contest
- Patrick Schaumont, Krste Asanovic, James C. Hoe:
MEMOCODE 2008 Co-Design Contest. 151-154 - Kermin Fleming, Myron King, Man Cheuk Ng, Asif Khan, Muralidaran Vijayaraghavan:
High-throughput Pipelined Mergesort. 155-158 - VJ Sananda:
Hardware Accelerated Crypto Merge Sort: MEMOCODE 2008 Design Contest. 159-162
Design Case Studies
- Kermin Fleming, Chun-Chieh Lin, Nirav Dave, Arvind, Gopal Raghavan, Jamey Hicks:
H.264 Decoder: A Case Study in Multiple Design Points. 165-174 - Eyad Alkassar, Peter Böhm, Steffen Knapp:
Correctness of a Fault-Tolerant Real-Time Scheduler and its Hardware Implementation. 175-186 - Venkatram Vishwanath, Lenore D. Zuck, Jason Leigh:
Specification and Verification of LambdaRAM: A Wide-area Distributed Cache for High Performance Computing. 187-198
Tutorial I
- Arvind, Rishiyur S. Nikhil:
Hands-on Introduction to Bluespec System Verilog (BSV) (Abstract). 205-206
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